Influence of grain size and grain boundary interface on the electrical properties of oxide nanocrystals under biased conditions

International Meeting on Advanced Nanomaterials and Nanotechnology
November 07-08, 2017 Singapore

T Prakash

University of Madras, India

Posters & Accepted Abstracts: Nano Res Appl

DOI: 10.21767/2471-9838-C1-006

Abstract

Nanocrystalline CuO, CeO2 and TiO2 with various grain sizes were prepared by wet chemical methods such as precipitation and sol-gel process by tuning the various parameters during the course of reaction or post-processing procedures. Carrier transport through electrically active grain boundaries was studied under biased condition using impedance spectroscopy at room temperature were performed using Solartron (SI 1260) impedance/gain phase analyzer in the frequency range of 1 Hz to 1 MHz with platinum electrodes. To perform the impedance measurement, cylindrical pellets having 8 mm diameter and ~1 mm thickness were made by applying two ton uni-axial pressure to all the samples and sintered at the appropriate temperatures. After doing the impedance measurement, the pellets were crushed to get powders and characterized using Philips CM20 Transmission electron microscope (TEM) to study then grain size distribution and morphology. The observed grain size effect on voltage tunable dielectric constant behaviour obeys the â�?�?double Schottky grain boundary potential barrier height modelâ�?, these experimental results will be discussed in detail.

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