The effect of gate length on the operation of ZnO MOSFETs have been simulated. Three transistors with gate lengths of 100, 200 and 500 nm are simulated. Simulations show that with a fixed channel length, when the gate length is decreased, the output drain current is increased, and therefore the transistor transconductance increases. Moreover, with increasing temperature the drain current is reduced, which results in the reduced drain barrier lowering. The simulated device geometries and doping are matched to the nominal parameters described for the experimental structures as closely as possible, and the predicted drain current and other electrical characteristics for the simulated device show much closer agreement with the available experimental data.
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